Casio SA-10 + FPGA = Audio Synthesis

Hello there!

First, yes, I'm alive... You just need to know where to look for (Hint: Flickr or dA).

Second, no, this won't be a long post.

Third, new project!
https://github.com/zebarnabe/music-keyboard-vhdl/

Regarding this last point, I'm building an audio synthesizer from my dead Casio SA-10 (non-destructive modifications, might be able to repair it in the future) and my old Digilent Nexys 2 FPGA board...

So far, so good... It works as a proof of concept, though I need to make it properly since to ensure polyphony I instantiated 32 basic synthesizers instead of properly serialize the processes ... processing everything at the same time is always fun in a FPGA.

Currently taken logic is at 10%, I guess I can make it a lot better by serializing the output mixer alone... or lower the precision... 144kHz sampling with 16bits and 32 channels is a bit overkill, specially when the PWM controller only does 8 bits.

VHDL considerations...

While programming in VHDL can't be considered a very easy deal, there are certain things on it that are very easy to do... i lost 2 days with one of those things...

Making a crash course into VHDL sintax (and assuming that you know how a computer works in hardware terms), you control bits in vhdl... yes... bits... the simplest think in computers world... of course that it isn't very easy to do complex things of a thing so simple, but anyone understands that shifting bits is just picking a bunch of them and putting them a little bit aside.

In VHDL you can create arrays - vectors - of bits, and you can access each bit or a pack of them by indexing them, sounds scary, but it's very easy actually, one with no knowledge in programming should have no problem doing a static shifter in vhdl.

To index bits, you need to 'create' them... well ... there is a lot of mambo-jambo in VHDL for doing declalations, and while i mastered most of VHDL sintax i still fail in the most basic stuff (well, i'm always learning from mistakes but it doesn't seem enough xD).

Well... lets say you have a array of bits, better saying a vector, in vhdl it is called std_logic_vector, and it's simple a vector of std_logic elements.. std_logic elements are the representation of a signal value in hardware (well, kinda) they can be 1, 0 or other ugly stuff you really don't wanna know...

Ok... we have our vector puppy in a signal, this should be human readable (or i'm loosing my human side):

signal puppy : std_logic_vector (31 downto 0);

So puppy has 32 bits ordered like 31 down to 0... how nice...

if you want a bit from puppy, you just do like this:

puppy(3)

And that is bit number 3... it's 4th bit if you count from right, since there is a bit 0... easy to get right?

Now harder! >:D you want... the 8 first bits... that will be hard, right?

puppy(7 downto 0)

Damn... was too easy... well... this is being great but grabbing bits without interact with them is a bit... worthless... well... you have a nice operator for concatenate bits! So now we can make our shifter... to concatenate bits you just use & operator like so:

'0'&"0000001"

So ... easy to get ('0' is a bit with zero value .... and "0000001" is a vector of bits) ... so 8 bits with the least significant bit (if you consider the right the least significant bit) at '1'

Now ... how to shift? You should get it now without any help, let's shift our puppy 8 bits to right!

"00000000"&puppy(31 downto 8)

Easy... right? I mean... you couldn't fail that... no way.... right? I did fail at doing that... and lost 2 days of work >:(

I wanted to shift one bit to right, i did like this (taking puppy as an example):

'0' & accu(30 downto 0)

That simply replaces the last bit with '0' ... >___>''

PS: Sorry for the length of this post... 

Nexys2 with plexiglass

Pictures speak for themselves...

I know it will get scratched, but at least is not the board that will get those scratches ... :p

Pong... yay...

Well ... just pong... Youtube link Enjoy!

VGA 8bits per pixel limitation... not a real issue!

This was the most colourful image i could find in my images folder (image from VGCats.com): As you can see only the sun is a bit weired... this was using a custom 256 color pallete on gimp and simply changing color mode to index using dirthering.... Dirthering is really powerful ... I was surprised with the results i've obtained using only 256 colors, specially with only 2 bits for blue channel, i shall try applying a small image into fpga to check if the final result is really this good... who knows, perhaps a small animation XD I may upload the pallete later for the ones who wish to try :p PS: It's 12:48 ... why does blogger think it's 4:24am .... i'll never know >__>''

FPGA and VGA Screen

It wasn't easy... but i manage to put VGA to work on the nexys2. Main issues i found and solve: 1) Screen mode - My lcd doesn't like 640x480@60Hz ... it works but it complains (something like: please use 1440x900@75Hz) 2) Calculus issues - After change to 800x600@72Hz (50Mhz pixel clock - the clock of the fpga how nice... XD), i found out my pixel mapping was all wrong... the reason? Apparently a math error, mine of course, i just forgot that putting stuff closer isn't made first x_coor <= H_Counter - HP+HB that + was supposed to be a minus or ... just put it like (HP+HB) .. yeah, stupid me... >__>'' ... it's a bit sad, since this thing made me lost about 3h of work... 3) Syncronization issues - After try some extra logic stuff to calculate the color of a pixel, i found out that it might cause some little gliches .... not happy with them, i used a syncronization buffer In the end i just obtained a very nice VGA module it allows the use of an independent pixel mapper module, thanks to an extra sincronization module... it even allows the sheduling of pixels ahead of time... that way is possible to pipeline some work. If possible i'll try to show my VGA module in action in a near future (maybe a pong game, that sounds easy enough XD) And in case you're gonna ask how VGA signal works: Timings The best google result you will find (pdf) Any questions or ideas, just post below...

FPGA - Nexys2

While was not today, the Nexys2 from digilent has finally arrived, i spent the weekend playing a bit with it, it is a quite neat package, i had already the latest Xilinx ISE Webpack installed, so was just a matter of reading the reference manual, set the pins and start testing stuff. Just a tip: If you adquired one of these, you may feel some trouble in using the segment display, to activate an anode you must use zero value there and to activate a catode (that controls each segment independently) you must also use zero value there. Also, buttons and segment displays are inversed, so ... button zero is at right and segment display controled by anode zero is at left, so if you're using buttons to do some action on the display above them take this in consideration. The demo/test provided gave me some trouble to compile in ISE 10 ... it was made for version 8, eitherway source code of it provides a nice tutorial in how to use VGA port and PS/2 for a mouse. If i get time i shall show you some demos of it running crazy stuff i made to test some code (an Hello World running into segment displays.. scrolling of course, 4 displays aren't enough for 11 chars) I also leave some links that might be useful if you didn't already knew it: fpga4fun (digilent site has changed)